airport road

Physical design in VLSI circuits is getting more complex with increase in circuit complexity. The major troublesome job in physical design is the difficulties encountered in routing. In physical design of digital circuits optimization of area is more important unlike in analog circuits where performance is given more priority. In the process of optimization of area in digital circuits routing in higher blocks can get more sophisticated. Standard cells are used as leaf cells in designing of higher digital blocks where the height of the standard cells has to be optimum. Therefore it is necessary to carefully design the standard cells and also create an environment for easy creation of bigger blocks using these leaf cells with simple routing at the top level. In this paper, a standard cell library is created where the height of the cells is optimize