INSTRUCTION SCHEDULER FRAMEWORK FOR TRANSPORT TRIGGERED ARCHITECTURES

A ustom-tailored appli ation-spe i pro essor (ASIP) an be used when no general-purpose pro essor (GPP) in the market an fulll the requirements set for an embedded system. ASIPs are o-designed with the software used in the system, a ording to any possible restri tions in performan e, energy onsumption and used sili on area. Designing appli ation-spe i pro essors is usually demanding, time- onsuming and ostly. Therefore, the design pro ess should be automated as mu h as possi-ble. TTA-Based Codesign Environment (TCE) is a toolset that provides a semi-automated design ow of appli ation-spe i pro essors helping embedded system developers in nding the most optimal pro essor ar hite ture to run the appli ation at hand. TCE is based on the transport triggered ar hite ture (TTA) pro essor paradigm. TTA is a highly modular and exible templated pro essor ar hite ture well suited for ustomization. The most important and ompli ated tool in the TCE toolset is the ompiler. This thesis presents a software framework written for the TCE ompiler ba k-en