Abstract—This paper presents a multi-core SoC architecture for consumer multimedia applications. The comprehensive functionality of such multimedia systems is described using the example of a hybrid TV application. The successful usage of a heterogeneous multi-core SoC platform is presented and it is shown how specific challenges such as inter-processor communication and real-time performance guarantees in physically centralized memory systems are addressed. Keywords—component; multiprocessor; TV; physically centralized memory system I
A multimedia system has unprogrammable task-specific processors of high performance-density. The tas...
A new video processing architecture for high-end TV applications is presented, featuring a flexible ...
A chip for the concurrent processing of many real time multi-media streams has three independent and...
This work presents the integration of several IPs to generate a system-on-chip (SoC) for digital tel...
This paper presents an application domain driven approach to the design of embedded systems on silic...
Modern sophisticated multimedia-like applications are extremely useful, but require hardware platfor...
Abstract — This paper presents a generic multi-processor architecture for video processing 1, featur...
Today, there are increasingly more powerful many-core processors (MCPs) that are integrated into sta...
The main challenge for reducing the design effort cost of complex systems on chip is to pursue more ...
The new generation of multimedia systems will be fully digital. This includes real time digital TV t...
Novel algorithmic features of multimedia applications and System on Chip (SoC) design using state-of...
This paper presents a generic multiprocessor architecture for video processing, featuring an array o...
For at least a decade or more, multimedia developers have taken for granted, that each generation of...
In this paper, a reconfigurable computing processor core for multimedia system-on-chip (SOC) applica...
A multimedia system has unprogrammable task-specific processors of high performance-density. The tas...
A new video processing architecture for high-end TV applications is presented, featuring a flexible ...
A chip for the concurrent processing of many real time multi-media streams has three independent and...
This work presents the integration of several IPs to generate a system-on-chip (SoC) for digital tel...
This paper presents an application domain driven approach to the design of embedded systems on silic...
Modern sophisticated multimedia-like applications are extremely useful, but require hardware platfor...
Abstract — This paper presents a generic multi-processor architecture for video processing 1, featur...
Today, there are increasingly more powerful many-core processors (MCPs) that are integrated into sta...
The main challenge for reducing the design effort cost of complex systems on chip is to pursue more ...
The new generation of multimedia systems will be fully digital. This includes real time digital TV t...
Novel algorithmic features of multimedia applications and System on Chip (SoC) design using state-of...
This paper presents a generic multiprocessor architecture for video processing, featuring an array o...
For at least a decade or more, multimedia developers have taken for granted, that each generation of...
In this paper, a reconfigurable computing processor core for multimedia system-on-chip (SOC) applica...
A multimedia system has unprogrammable task-specific processors of high performance-density. The tas...
A new video processing architecture for high-end TV applications is presented, featuring a flexible ...
A chip for the concurrent processing of many real time multi-media streams has three independent and...