Formal Methods in System Design, 23, 223–256, 2003 c © 2003 Kluwer Academic Publishers. Manufactured in The Netherlands.

Abstract. We introduce algebras capable of representing, detecting, identifying, and counting static and dynamic hazard pulses that can occur in the worst case on any wire in a gate circuit. These algebras also permit us to count the worst-case number of signal changes on any wire. This is of interest to logic designers for two reasons: each signal change consumes energy, and unnecessary multiple signal changes slow down the circuit operation. We describe efficient circuit simulation algorithms based on our algebras and illustrate them by several examples. Our method generalizes Eichelberger’s ternary simulation and several other algebras designed for hazard detection