FPGA Redundancy Recovery based on Partial Bitstreams for Multiple Partitions

Abstract—The Triple Modular Redundancy (TMR) strategy is a common and good option for a system to recover from possible faults. However, in case of a permanent fault in the TMR hard-ware, the redundancy advantage can be destroyed. In this paper, we present a low cost solution to enable Fault Detection, Isolation and Recovery (FDIR) in a TMR system. Our methodology uses the Assisted Design Flow (ADF) that implements Partial Bitstream for Multiple Partitions (PB4MP). This method allows to relocate modules in different Reconfigurable Partitions (RPs) using only one bitstream per module. The results show that with a minor increase in the program memory of the digital design, it is possible to increase considerably the TMR availability. Keywords—Bistream for Multiple Partitions; FPGA Recover