H.: Code-based test generation for validation of functional processor descriptions

Abstract. Microprocessor design deals with many types of specifica-tions: from functional models (SystemC or proprietary languages) to hardware description languages such as VHDL or Verilog. Functional descriptions are key to the development of new processors or System On Chips at STMicroelectronics. In this paper we address the problem of automatic generation of high quality test-suites for microprocessor functional models validation. We present the design and implementation of a software tool based on con-straint solving techniques which analyzes the control flow of the initial description in order to generate tests for each path. The test vectors are computed with a dedicated constraint solver designed to handle specific constraints related to typical constructs found in microprocessor descrip-tions. Results are illustrated with a case study