Rollback-free value prediction with approximate loads

This paper demonstrates how to utilize the inherent error resilience of a wide range of applications to mitigate the memory wall— the discrepancy between core and memory speed. We define a new microarchitecturally-triggered approximation technique called rollback-free value prediction. This technique predicts the value of safe-to-approximate loads when they miss in the cache without tracking mispredictions or requiring costly recovery from misspec-ulations. This technique mitigates the memory wall by allowing the core to continue computation without stalling for long-latency mem-ory accesses. Our detailed study of the quality trade-offs shows that with a modern out-of-order processor, average 8 % (up to 19%) per-formance improvement is possible with 0.8 % (up to 1.8%) average quality loss on an approximable subset of SPEC CPU 2000/2006.