Characterizing Vulnerability of Network Interfaces in Embedded Chip Multiprocessors

sign complexity and technology scaling, soft errors have become a key design challenge. In this work, we extend the concept of ar-chitectural vulnerability factor (AVF) from the microprocessor do-main and propose a network vulnerability factor (NVF) to charac-terize the susceptibility of Network Interfaces (NIs) to soft errors. For the first time, a detailed characterization of vulnerability is performed on a state-of-the-art AXI-based NI architecture using full system simulation. Our studies reveal that different NI buffers behave quite differently in the presence of transient faults and each buffer can have different inherent tolerance to faults. Our analysis also considers the impact of thermal hotspot mitigation techniques on the NVF estimation. Index Terms—Fault tolerance, network interface, networks-on-chip. I