Shared Resources for

To define the multi-core multi threaded architecture at a higher abstraction layer. To create a queueing model simulator. obtains a fine-grain characterization of the architecture, easily mimics the application characteristics, mimics characteristics of incoming network traffic. The developed tool to model the architectures; generic & flexible; fast and easy to run and maintain. allows monitoring and obtaining information from each significant phase. allows doing a wide variety of what-if studies. Validations (real hardware and using 3 different benchmark sets) In isolation and in combination. A real hardware-UltraSPARC T2 processor; a good representative multi-core multi-threaded processor with 3 level shared resources