Characterizing the Performance of Value Prediction using Statistical Simulations

Abstract – While the speedup potential of value prediction (VP) is appealing, value locality, predictor accuracy, and hardware restrictions place practical limits on achievable per-formance. In this study, a statistical simulation approach is used to characterize the upper limits of VP performance. By emulating the behaviour of value predictors, the performance of VP is studied under best-case operating conditions for a 5-stage pipeline possessor with register forwarding and separate functional units for prediction validation. The simulation pro-gram developed in this study uses a synthetically generated instruction stream to model a generic integer application. Ex-periments are conducted over a wide range of value locality and predictor accuracy values. An upper limit of 10-30 % was found to exist when VP is applied to both LOAD and ALU instructions. An upper limit of 80 % was found to exist for LOAD only prediction with an average L2/MEM latency of 100 cycles. Statistical simulation results revealed that the up-per limit of VP speedup is not significantly higher than full execution-driven simulation results reported by other re-searchers. The rather low upper limits of VP performance found in this study may explain why there is still no commer-cial processor that employs VP as a general speculative execu-tion technique. I