LOGIC SYNTHESIS OF BINARY CARRYSAVE AND MIXEDRADIX ARITHMETIC FOR DIGITAL SIGNAL PROCESSING

email bitterliertrwthaachende Abstract All the commercially available logicsynthesis tools cur rently use only nonredundant binary and twos complement number representations for representing the results of arithmetic operators In this paper we analyze and compare silicon realestate and throughput of wordparallel arithmetic circuits add and shift type arithmetics based on various redundant number representations and compare these results with the automatically optimized twos complement implementations The literature on redundant number representations typically recommends radix arithmetics for fullcustom or a traditional semicustom design style We show that the radix implementation is often not optimal for a logicsynthesis based semicustom design style Instead a highradix or a mixedradix implementation which we derive in this paper should be considere