Synthesis of Application-Specific Highly Efficient Multi-mode Cores for Embedded Systems

We present a novel design methodology for synthesiz-ing multiple configurations (or modes) into a single pro-grammable system. Many DSP and multimedia applica-tions require reconfigurability of a system along with effi-ciency in terms of power, performance and area. FPGAs provide a reconfigurable platform, however, they are slower in speed with significantly higher power consumption than achievable by a customized ASIC. In this work, we have developed techniques to realize an efficient reconfigurable system for a set of user-specified configurations. A data flow graph transformation method coupled with efficient scheduling and allocation are used to automatically synthe-size the system from its behavioral level specifications. Ex-perimental results on several applications demonstrate that we can achieve about 60X power reduction on average with about 4X improvement in performance over corresponding FPGA implementations. 1