Multiple-valued Logic in

This paper considers the applicability of multiple-valued logic (MVL) circuits in implementation of field-program-mable gate arrays (FPGAs). I t proposes an FPGA logic block architecture that features MVL current-mode CMOS circuitry. The logic block combines the lookup-table and multiplexer approaches found in FpGAs, and provides versatility through its current-mode operation. Its main purpose is to motivate future work in this direc-tion, by discussing the feasibility of MVL logic blocks and their impact on the architecture of FPGAs. 2.0 Current-Mode MVL Circuits Recent experience shows that current-mode circuits are attractive for implementation of MVL functions. Most o