Demonstration of the APRON Processor Array Simulation Software

Abstract – A software tool for the development, prototyping and emulation of cellular processor array hardware is presented. APRON provides a ‘virtual processor array ’ that operates at high speed, that can be extended to form vision systems, multi-layer neural networks, cellular neural networks and neuromorphic arrays. SUMMARY Cellular Processor Arrays (CPAs) like those in [1,2] implement a high-density grid of computationally simple processors, with local memories, and neighbourhood communication, operating under the Single Instruction Multiple Data (SIMD) paradigm. This arrangement has proven to be particularly suited to pixel-parallel image processing, cellular neural networks (CNNs), multi-layer neural networks, neuromorphic arrays, and computational neuroscience models. This suitability is largely due to the elimination of any memory access bottlenecks, traditionally associated with serial implementations of the same applications, and specifically designed functional components within the processors. The field of CPA related research has been growing steadily, therefore so has the development of new hardware. We have developed a software system that can be used at all stages in the lifecycle of a CPA device. APRON (Array Processing enviRONment) is a flexible, processor array design and simulation tool [3], which has been optimised for high speed and accuracy on a standard desktop computer. This demonstration will show the APRON system performing a variety of algorithms, with a bias towards vision system emulation. Through the use of a webcam, images are captured and processed fast-enough to result in an interactive simulation. Figure 1 shows the APRON software executing several algorithms: a) The APRON IDE, b) Hole-Filling using the CNN paradigm, c) Retina Vessel Extraction using Pixe