CATS: Cache Aware Task-Stealing . . .

Multi-socket Multi-core architectures with shared caches in each socket have become mainstream when a single multi-core chip cannot provide enough computing capacity for high performance computing. However, traditional task-stealing schedulers tend to pollute the shared cache and incur severe cache misses due to their randomness in stealing. To ad-dress the problem, this paper proposes a Cache Aware Task-Stealing (CATS) scheduler, which uses the shared cache effi-ciently with an online profiling method and schedules tasks with shared data to the same socket. CATS adopts an online DAG partitioner based on the profiling information to en-sure tasks with shared data can efficiently utilize the shared cache. One outstanding novelty of CATS is that it does not require any extra user-provided information. Experimen-tal results show that CATS can improve the performance of memory-bound programs up to 74.4 % compared with the traditional task-stealing scheduler