Design, Performance

High-performance general-purpose graphics processing units (GPGPUs) may suffer from serious power and negative bias temperature instability (NBTI) problems. In this paper, we propose a framework for run-time aging and power optimiza-tion. Our technique is based on the observation that many GPGPU applications achieve optimal performance with on-ly a portion of cores due to either bandwidth saturation or shared resource contention. During run-time, given the dynamically tracked NBTI-induced threshold voltage shift and the problem size of GPGPU applications, our algorith-m returns the optimal number of cores using detailed per-formance modeling. The unused cores are power-gated for power saving and NBTI recovery. Experiments show that our proposed technique achieves on average 34 % reduction in NBTI-induced threshold voltage shift and 19 % power re-duction, while the average performance degradation is less than 1%