Current Reconfigurable Computers (RCs) do not share a unified architectural model, which presents a challenge to any developer who intends to port hardware designs across different RC platforms. In this paper, we propose a portable memory access framework that gives the user a unified memory view combining the host memory and the lo-cal memory of FPGA. Three memory access modes are pro-vided, and the hardware cost and performance impact have been measured on three major RCs: SRC-6, SGI RC-100 and Cray XD1. Under current implementation, the penalty to hardware resource utilization and performance of apply-ing this framework is reduced to minimum. 1
International audienceMany reconfigurable hardware architectures have been proposed so far, ranging ...
A key enabler for the ever-increasing adoption of FPGA accelerators is the availability of framework...
Field-programmable gate array (FPGA) is a post fabrication reconfigurable device to accelerate domai...
ABSTRACT: Reconfigurable Computing (RC) refers to the use of reconfigurable hardware devices to acce...
One step in the synthesis for FPGA-based Reconfig-urable Computers (RCs) involves mapping the design...
The combination of traditional microprocessors workstations and hardware-reconfigurable Field Progra...
As memory accesses increasingly limit the overall performance of reconfigurable accelerators, it is ...
n the past few years, high-performance computing vendors have introduced many systems contain-ing bo...
Since they were first introduced three decades ago, Field-Programmable Gate Arrays (FPGAs) have evol...
Abstract: We introduce the concept of an operating system for platforms that consist beside memory a...
This work discusses the Memory Architecture for Reconfigurable Computers (MARC), a scalable, device...
We present a high performance memory attachment for custom hardware accelerators on reconfigurable S...
Reconfigurable computing applications have traditionally had the exclusive use of the field programm...
FPGA-based Configurable Computing Machines (CCMs) offer powerful and flexible general-purpose com-pu...
On-chip multiport memory cores are crucial primitives for many modern high-performance reconfigurabl...
International audienceMany reconfigurable hardware architectures have been proposed so far, ranging ...
A key enabler for the ever-increasing adoption of FPGA accelerators is the availability of framework...
Field-programmable gate array (FPGA) is a post fabrication reconfigurable device to accelerate domai...
ABSTRACT: Reconfigurable Computing (RC) refers to the use of reconfigurable hardware devices to acce...
One step in the synthesis for FPGA-based Reconfig-urable Computers (RCs) involves mapping the design...
The combination of traditional microprocessors workstations and hardware-reconfigurable Field Progra...
As memory accesses increasingly limit the overall performance of reconfigurable accelerators, it is ...
n the past few years, high-performance computing vendors have introduced many systems contain-ing bo...
Since they were first introduced three decades ago, Field-Programmable Gate Arrays (FPGAs) have evol...
Abstract: We introduce the concept of an operating system for platforms that consist beside memory a...
This work discusses the Memory Architecture for Reconfigurable Computers (MARC), a scalable, device...
We present a high performance memory attachment for custom hardware accelerators on reconfigurable S...
Reconfigurable computing applications have traditionally had the exclusive use of the field programm...
FPGA-based Configurable Computing Machines (CCMs) offer powerful and flexible general-purpose com-pu...
On-chip multiport memory cores are crucial primitives for many modern high-performance reconfigurabl...
International audienceMany reconfigurable hardware architectures have been proposed so far, ranging ...
A key enabler for the ever-increasing adoption of FPGA accelerators is the availability of framework...
Field-programmable gate array (FPGA) is a post fabrication reconfigurable device to accelerate domai...