Enhancement-Mode InAlN/AlN/GaN HEMTs With 10−12 A/mm Leakage Current and 1012 ON/OFF Current Ratio

Abstract—Postprocessing annealing in forming gas at 400 ◦C was performed on enhancement-mode lattice-matched InAlN/AlN/GaN high-electron-mobility transistors fabricated by selective etch of InAlN under a Pt gate. After postprocessing annealing, the device reverse gate leakage current decreased from 10−7 to 10−12 A/mm at Vgs = −1 V and Vds = 6 V, showing an ON/OFF current ratio of 1012 that is the highest reported value for all GaN-based transistors. The gate diode breakdown voltage was observed to increase from∼9 to∼29 V; the transistor threshold voltage was also found to shift from 0.6 to 1.2 V. All these observations indicate that an electrically thinner and more insulating interlayer is most likely formed between the Pt gate and underlying channel after postprocessing annealing, which is ascribed to multiple possible mechanisms including increase in barrier height, reduction in interface states introduced during the gate recess process, formation of a thin oxide layer, etc. Index Terms—Enhancement mode (E-mode), gate leakage current, InAlN, postprocessing annealing. I