Add to ORKGAbstract* — Quality-of-Service (QoS) communication has been a key issue since the birth of Network-on-Chip (NoC). Time Division Multiplexing (TDM) techniques are well-recognized to be capable of providing guarantees in latency and bandwidth. However, current TDM VC proposals assume synchronous operation and use a costly slot allocation table to statically allocate bandwidth. In this paper, we propose a novel TDM VC implementation that releases the strict synchronous operation assumption and computes slot allocation fully dynamically. To promise VC contention-free, we use the Logical Network theory to guide the slot computation. The slot allocation information is computed once and propagated downstream. This enables adaptive VC configuration...
In this paper we explore the design of an asynchronous router for a time-division-multiplexed (TDM) ...
Network-on-chip (NoC) is an emerging interconnect infrastructure to address the scalability limitati...
The rapid development in the electronics industry leads to a design process dominated by time-to-mar...
Circuits (VCs) for network-on-chip must guarantee conflict freedom for overlapping VCs besides alloc...
Time-division-multiplexed networks based on the contention- free routing model represent an attracti...
Time-division-multiplexed networks based on the contention-free routing model represent an attractiv...
MP-SoCs are expected to require complex communication architectures such as NoCs. This paper present...
One of the challenges of engineering is to make the best possible use of the available resources, or...
MP-SoCs are expected to require complex communication architectures such as NoCs. This paper present...
In today’s emerging Network-on-Chips, there is a need for different traffic classes with different Q...
Networks-on-chip have evolved as the natural solution for a scalable interconnect that can be automa...
AbstractGrowing number of on-chip cores requires the introduction of an efficient communication stru...
Growing number of on-chip cores requires the introduction of an efficient communication structure su...
Abstract—As multi-/many-core architectures evolve, the de-mands on the Network-on-Chip (NoC) are amp...
In this paper we explore the design of an asynchronous router for a time-division-multiplexed (TDM) ...
Network-on-chip (NoC) is an emerging interconnect infrastructure to address the scalability limitati...
The rapid development in the electronics industry leads to a design process dominated by time-to-mar...
Circuits (VCs) for network-on-chip must guarantee conflict freedom for overlapping VCs besides alloc...
Time-division-multiplexed networks based on the contention- free routing model represent an attracti...
Time-division-multiplexed networks based on the contention-free routing model represent an attractiv...
MP-SoCs are expected to require complex communication architectures such as NoCs. This paper present...
One of the challenges of engineering is to make the best possible use of the available resources, or...
MP-SoCs are expected to require complex communication architectures such as NoCs. This paper present...
In today’s emerging Network-on-Chips, there is a need for different traffic classes with different Q...
Networks-on-chip have evolved as the natural solution for a scalable interconnect that can be automa...
AbstractGrowing number of on-chip cores requires the introduction of an efficient communication stru...
Growing number of on-chip cores requires the introduction of an efficient communication structure su...
Abstract—As multi-/many-core architectures evolve, the de-mands on the Network-on-Chip (NoC) are amp...
In this paper we explore the design of an asynchronous router for a time-division-multiplexed (TDM) ...
Network-on-chip (NoC) is an emerging interconnect infrastructure to address the scalability limitati...
The rapid development in the electronics industry leads to a design process dominated by time-to-mar...