Migrating to a realtime distributed parallel simulator architecture

A legacy non-distributed logical time simulator is migrated to a distributed architecture to parallelise execution. The ex-isting Discrete Time System Specification (DTSS) modelling formalism is retained to simplify the reuse of existing mod-els. This decision, however means that the high simulation frame rate of 100Hz used in the legacy system has to be re-tained in the distributed one—a known difficulty for existing distribution technologies due to inter-process communication latency. A specialised publish-subscribe simulation model is used for the new simulator architecture. The simulation model, in-cluding the process synchronisation, is implemented using a low latency peer-to-peer TCP messaging protocol. The TCP send and receive buffers and TCP’s Nagle algorithm are also tweaked to ensure low latency communication. Gigabit Eth-ernet is used at the hardware layer. A parallelised execution speed-up of four to five times is reached with six to eight ma-chines at a simulation frame rate of 100Hz