Hardware Generation Languages as a Foundation for Credible, Reproducible, and Productive Research Methodologies

Cycle-approximate simulators (CAS) have long been a staple in the experimental toolkit of computer architecture researchers. How-ever, recent technology trends have triggered a growing emphasis on specialization and heterogeneity, bringing into question the viabil-ity of a purely CAS-based methodology. In this position paper, we argue computer architects should consider adopting an increased fo-cus on synthesizable hardware description languages (HDL) to im-prove credibility and reproducibility. Additionally, we discuss the need for hardware generation languages and integrated frameworks to improve researcher productivity and close the gap between current CAS and HDL methodologies. 1. A Tale of Two Research Methodologies Modern computer architecture research has increasingly relied on the use of cycle-approximate simulators (CAS) as the primary tool for evaluating novel architectural mechanisms. We characterize a CA