The Alewife CMMU: Addressing the Multiprocessor Communications Gap

Company X has just expended 50 engineers over the last three years to produce their latest microprocessor. Now what? Well, popular wisdom suggests that they should connect a \bunch" of the micros together with some generic network to form a multiprocessor. This will yield \truly impressive performance " which the marketing department can quantify by multiplying the number of processors per box by the stellar MIPS-rating of the new microprocessor. Right? Unlikely. Communication is fundamental to multiprocessing. In fact, the mechanisms for communication can make or break the performance of a multiprocessor. Consequently, \truly impressive performance " across a wide range of applications can be achieved only with careful design of the communication mechanisms. The Alewife Solution. The Alewife Communications and Memory Management Unit (A-1000 CMMU) provides ecient, low-overhead communication mechanisms for general-purpose large-scale multiprocessing. It integrates both message passing and shared memory in a single uni ed framework. It can handle system congurations up to 512 processors, with each node in such a system consisting of an A-1000 CMMU, a Sparcle processor[1], an FPU, 64K of cache, 8Mb of DRAM, and an MRC network chip. The Sparcle processor is tightly coupled with th