Vertical and lateral heterogeneous integration

The wafer-scale integration of advanced optical, electrical, and micromechanical semiconductor devices on a single chip requires techniques for combining differing semiconductor structures in the plane of the wafer. We have developed a technique for achieving large-scale monolithic integration of lattice-mismatched materials in the vertical direction and the lateral integration of dissimilar lattice-matched structures. The technique uses a single non-planar wafer-bonding step to transform epitaxial structures into lateral epitaxial variation across the surface of a wafer. Non-planar wafer bonding begins with multiple epitaxial regions grown vertically on a wafer as shown for the case of four different regions in Fig. 1. The surface is then etched with a step shaped profile to reveal a different epitaxial region on each step level. The backside of the wafer is etched to have a profile complimentary to the step etched epitaxial film side of the wafer, as shown in Fig. 2(a). This substrate thickness adjustment etch is designed to yield an identical substrate plus epitaxial film thickness at each lateral point on the wafer. The lateral offset between the front side and backside step edges determines the distance over which the substrate and epitaxial layers must accommodate the deformation. The wafer is then direct wafer bonded [1] to a transfer substrate. We can remove the original growth substrate leaving the epitaxial layers attached to the transfer substrate as depicted in Fig. 2(b). At this point the excess epitaxial layers and the deformation accommodation regions are etched back, leaving a different epitaxial region at each lateral position on the transfer substrate as represented by Fig. 2(c)