Abstract—An ADC using folding and interpolating tech-niques has been realised in 0.35 µm CMOS. A current-mode approach has been adopted. Fully differential current mode interpolating within the folder allows fast operation with low supply voltages. The folding ADC architecture reduces the number of comparators. The ADC has a dynamic range of 1.9V and can digitize a 75Mhz full-scale input signal. The 8 bit converter occupies 2mm2 and dissipates 150mW from a single 3.3V supply. Keywords—Analog-to-digital conversion, CMOS, folding, interpolatin
An 8-bit 200 MS/s CMOS 2-stage cascaded folding/interpolating ADC chip was implemented by applying a...
The motivation behind this work is to target the demand for high-speed medium-resolution ADCs for sa...
In this paper, a CMOS analog-to-digital converter (ADC) with an 8-bit 500MSPS at 1.8V is designed. T...
A 8-bit 150MHz low-power CMOS folding and interpolating analog-to-digital converter with a fully-fol...
Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
Abstract — Analog to Digital converter plays an important role as the interface between analog and d...
This paper presents an 8-bit low power cascaded folding and interpolating analog-to-digital converte...
A CMOS analog to digital converter based on the folding and interpolating technique is presented. Th...
In bipolar technology the folding and interpolation technique has proven to be successful for high s...
A CMOS analog to digital converter based on the folding and interpolating technique is presented. Th...
An 8-bit 200MHz low-power CMOS folding and interpolating analog-to-digital converter is presented. A...
A 8-bit 200MHz low-power CMOS folding and interpolating analog-to-digital converter is designed. A s...
An 8-bit 200MHz low-power CMOS folding and interpolating analog-to-digital converter is presented.A ...
A 8-bit 200MHz low-power CMOS folding and interpolating analog-to-digital converter is designed. A s...
The design techniques for analog-to-digital converters (ADCs) require careful optimization in order ...
An 8-bit 200 MS/s CMOS 2-stage cascaded folding/interpolating ADC chip was implemented by applying a...
The motivation behind this work is to target the demand for high-speed medium-resolution ADCs for sa...
In this paper, a CMOS analog-to-digital converter (ADC) with an 8-bit 500MSPS at 1.8V is designed. T...
A 8-bit 150MHz low-power CMOS folding and interpolating analog-to-digital converter with a fully-fol...
Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
Abstract — Analog to Digital converter plays an important role as the interface between analog and d...
This paper presents an 8-bit low power cascaded folding and interpolating analog-to-digital converte...
A CMOS analog to digital converter based on the folding and interpolating technique is presented. Th...
In bipolar technology the folding and interpolation technique has proven to be successful for high s...
A CMOS analog to digital converter based on the folding and interpolating technique is presented. Th...
An 8-bit 200MHz low-power CMOS folding and interpolating analog-to-digital converter is presented. A...
A 8-bit 200MHz low-power CMOS folding and interpolating analog-to-digital converter is designed. A s...
An 8-bit 200MHz low-power CMOS folding and interpolating analog-to-digital converter is presented.A ...
A 8-bit 200MHz low-power CMOS folding and interpolating analog-to-digital converter is designed. A s...
The design techniques for analog-to-digital converters (ADCs) require careful optimization in order ...
An 8-bit 200 MS/s CMOS 2-stage cascaded folding/interpolating ADC chip was implemented by applying a...
The motivation behind this work is to target the demand for high-speed medium-resolution ADCs for sa...
In this paper, a CMOS analog-to-digital converter (ADC) with an 8-bit 500MSPS at 1.8V is designed. T...