Abstract Four-dimensional (4-D) infinite impulse response frequency hyper-planar filter and a digital VLSI architecture for real time light field based depth filtering applications is proposed. A signal flow graph based on discrete spatial integrators is introduced, which leads to improved sensitivity properties for perturbations in filter coefficients. First order sensitivity analysis of filter transfer function shows a 92.9 % reduction of maximum gain error in frequency response with 12 bits of fractional precision, when compared with a direct-form architecture. Prototype FPGA hardware-in-the-loop co-simulations are performed for two different light field geometries. Register transfer level design validation is carried out via FPGA hardwa...
This paper explores the design and implementation of an adaptive Finite Impulse Response (FIR) Filte...
It is discussed in many studies and demonstrated in many pieces of research that based on certain ap...
International audienceIn this paper, we present a hardware reconfigurable architecture of vector dir...
Four-dimensional (4-D) infinite impulse response frequency hyper-planar filter and a digital VLSI ar...
Low-complexity signal processing algorithms and reconfigurable digital hardware architectures are pr...
The design and hardware implementation of a low-complexity signal processing algorithm is proposed f...
We propose the application of light field cameras and depth-selective 4-D IIR filtering to enable vi...
Advances in the performance of VLsi circuits are leading to a number of emerging applications of mul...
Abstract—A novel parallel semi-systolic semi-scanned ar-ray architecture is proposed for the impleme...
Abstract We propose the application of light field cameras and depth-selective 4-D IIR filtering to ...
Light field signal processing allows manipulation of a rich set of information captured from a scene...
Four-dimensional (4-D) light fields (LFs) enable novel imaging technologies, which are traditionally...
Abstract. The paper reports on some experiments with implementing positional digital image filters u...
A novel multidimensional spatio-temporal signal processing algorithm is proposed for depth-velocity ...
Abstract—A light field is a four-dimensional (4-D) representa-tion of the light permeating a scene—i...
This paper explores the design and implementation of an adaptive Finite Impulse Response (FIR) Filte...
It is discussed in many studies and demonstrated in many pieces of research that based on certain ap...
International audienceIn this paper, we present a hardware reconfigurable architecture of vector dir...
Four-dimensional (4-D) infinite impulse response frequency hyper-planar filter and a digital VLSI ar...
Low-complexity signal processing algorithms and reconfigurable digital hardware architectures are pr...
The design and hardware implementation of a low-complexity signal processing algorithm is proposed f...
We propose the application of light field cameras and depth-selective 4-D IIR filtering to enable vi...
Advances in the performance of VLsi circuits are leading to a number of emerging applications of mul...
Abstract—A novel parallel semi-systolic semi-scanned ar-ray architecture is proposed for the impleme...
Abstract We propose the application of light field cameras and depth-selective 4-D IIR filtering to ...
Light field signal processing allows manipulation of a rich set of information captured from a scene...
Four-dimensional (4-D) light fields (LFs) enable novel imaging technologies, which are traditionally...
Abstract. The paper reports on some experiments with implementing positional digital image filters u...
A novel multidimensional spatio-temporal signal processing algorithm is proposed for depth-velocity ...
Abstract—A light field is a four-dimensional (4-D) representa-tion of the light permeating a scene—i...
This paper explores the design and implementation of an adaptive Finite Impulse Response (FIR) Filte...
It is discussed in many studies and demonstrated in many pieces of research that based on certain ap...
International audienceIn this paper, we present a hardware reconfigurable architecture of vector dir...