DELAY-BASED PATTERN RECOGNITION USING

This thesis describes the design and implementation of two pattern recognition systems on field-programmable gate arrays (FPGAs) that operate based on ‘time delays’. The idea was inspired by the concept of spiking neural networks (SNNs) which suggests information processing in biological neural systems is based on precise timing of action potentials or spikes. Both systems developed process patterns in the form of spatiotemporal spike sequences – patterns of spikes distributed over a population of neurons (“space”) and time. The pattern processor in both systems is a time-delay network consisting of programmable delays and coincidence detectors, which respectively perform pattern learning and matching. The network is implemented using an innovative ‘clock-free ’ design approach that exploits the architecture and hardware resources of FPGAs. The first system performs pattern learning and recognition tasks while the second operates as an auto-associative memory – a type of memory where stored data is retrieved via partial presentation of the original copy. Both systems demonstrate effective and fast processing of pattern recognition tasks with relatively low hardware cost