Coded IDMA System Performance with Parallel Interleavers

Abstract—In this paper we evaluate the use of parallel interleavers for user separation in coded IDMA systems. The parallel interleavers have previously been evaluated for uncoded systems, and we here present extended results for the coded case. The new results are important for real systems, as they will most likely use performance enhancing channel coding. The parallel interleavers are designed to remove the risk of memory access collision during interleaving. These problems may occur when the interleaving process is being parallelized in order to support parallel processing at the decoder. The results show that the use of parallel interleavers gives a performance that is similar to that obtained when using random interleavers. Furthermore, our results also show that the degree of parallelization in the interleaver design has an insignificant effect on system performance. Keywords- IDMA; parallel interleavers; system performance I