Architecture implementation using the machine description language LISA

The development of application specific instruction set processors comprises several design phases: architecture exploration, software tools design, system verification and design implementation. The LISA processor design plat-form (LPDP) based on machine descriptions in the LISA language provides one common environment for these de-sign phases. Required software tools for architecture explo-ration and application development can be generated from one sole specification. This paper focuses on the imple-mentation phase and the generation of synthesizable HDL code from a LISA model. The derivation of the architectural structure, decoder and even approaches for the implementa-tion of the data path are presented. Moreover, the synthesis results of a generated and a handwritten implementation of a low-power DVB-T post processing unit are compared. 1