A Framework for Dynamic Real-Time Reconfiguration

Abstract—In this work, we propose a framework capable of transparently switching between multiple hardware and software implementations of embedded system components to cope with and adapt to dynamic runtime characteristics such as power, throughput and quality of service. The reconfiguration process is decomposed into small steps such that it is preemptable, transparent, dynamic and compliant with real-time requirements. We present a Private Automatic Branch eXchange (PABX) system as a case study for the framework, and investigate the dynamic reconfiguration of three of its components: an ADPCM codec, a DTMF detector, and an AES core. Our results with this case study show how our framework is able to perform reconfiguration of hardware/software components in the order of a few milliseconds, without taking excessive system resources, and without disrupting the execution of application threads. Keywords—Dynamic partial reconfiguration, Real-Time, Field-programmable gate arrays (FPGAs), System-level design, HW/S