In DRAMs, stored data on a capacitor tend to leak over time because of leakage current. To retain data, DRAMs require periodic refresh based on a profile of retention time. However, accurate DRAM refresh characterization is hindered by variable retention time (VRT) owing to random telegraph noise. In this paper, we propose AVERT, a device model and circuit simulation methodology for variable retention time in DRAMs. Based on the charge trapping and detrapping model, we generate a random telegraph signal in trap-induced gate leakage and trap-assisted gate-induced drain leakage to model random fluctuations in the retention time of DRAMs. With AVERT, we apply a stochastic device model of variable retention time to circuit simulation. Our resul...
In this work, we propose for the first time a Verilog-A physics-based compact model of Random Telegr...
Gain cells have recently been shown to be a viable alternative to static random access memory in low...
DRAM cells use capacitors as volatile and leaky bit storage elements. The time spent without refresh...
As DRAM cells continue to shrink, they become more susceptible to retention failures. DRAM cells tha...
Abstract — Random telegraph noise (RTN) is one of the impor-tant dynamic variation sources in ultras...
Abstract—Multirate refresh techniques exploit the non-uniformity in retention times of DRAM cells to...
This paper deals with new stochastic modeling of very low tunneling currents in Non-Volatile Memorie...
Spin-transfer torque random access memory (STT-RAM) is a promising nonvolatile memory (NVM) solution...
International audienceThis paper deals with new stochastic modeling of very low tunneling currents i...
Simulations of an inverter and a 32-bit SRAM bit slice are performed based on an atomistic approach....
Abstract — This paper presents two fast and accurate methods to estimate the lower bound of supply v...
Dynamic random access memory (DRAM) is the most widely used type of memory in the consumer market to...
Random telegraph noise (RTN) adversely induces time dependent device-to-device variations and requir...
The purpose of this paper is to illustrate a physically-based model allowing the statistical simulat...
Gain-cell embedded DRAM (GC-eDRAM) is an interesting alternative to SRAMfor reasons such as high den...
In this work, we propose for the first time a Verilog-A physics-based compact model of Random Telegr...
Gain cells have recently been shown to be a viable alternative to static random access memory in low...
DRAM cells use capacitors as volatile and leaky bit storage elements. The time spent without refresh...
As DRAM cells continue to shrink, they become more susceptible to retention failures. DRAM cells tha...
Abstract — Random telegraph noise (RTN) is one of the impor-tant dynamic variation sources in ultras...
Abstract—Multirate refresh techniques exploit the non-uniformity in retention times of DRAM cells to...
This paper deals with new stochastic modeling of very low tunneling currents in Non-Volatile Memorie...
Spin-transfer torque random access memory (STT-RAM) is a promising nonvolatile memory (NVM) solution...
International audienceThis paper deals with new stochastic modeling of very low tunneling currents i...
Simulations of an inverter and a 32-bit SRAM bit slice are performed based on an atomistic approach....
Abstract — This paper presents two fast and accurate methods to estimate the lower bound of supply v...
Dynamic random access memory (DRAM) is the most widely used type of memory in the consumer market to...
Random telegraph noise (RTN) adversely induces time dependent device-to-device variations and requir...
The purpose of this paper is to illustrate a physically-based model allowing the statistical simulat...
Gain-cell embedded DRAM (GC-eDRAM) is an interesting alternative to SRAMfor reasons such as high den...
In this work, we propose for the first time a Verilog-A physics-based compact model of Random Telegr...
Gain cells have recently been shown to be a viable alternative to static random access memory in low...
DRAM cells use capacitors as volatile and leaky bit storage elements. The time spent without refresh...