Improved Switched-Capacitor Interpolators with Reduced Sample-and-Hold Effects

Abstract—This paper proposes improved switched-capacitor (SC) interpolators using a novel sampling technique which eliminates the undesired distortion due to the sample-and-hold shaping effect at the lower input sampling rate. Such a sampling technique not only leads to a precise analog interpolation, as its digital counterpart does, but also allows to simplify the design procedures and resulting SC circuit implementations. Different circuit topologies with both finite- and infinite-impulse response characteristics are developed, respectively, for low- and high-se-lectivity filtering. Practical implementation issues are discussed with respect to capacitance ratio mismatches, as well as finite gain, bandwidth, and offset sensitivity effects of operational amplifiers. Besides detailed computer-based analyses, experimental results obtained from discrete component prototypes are also presented to demonstrate the proposed circuits. Index Terms—CMOS analog integrated circuits, filtering, inte-grated circuit design, interpolation, multirate signal processing, sampled data circuits, signal sampling/reconstruction, switched-capacitor filters. I