Abstract—The sampling jitter is particularly problematic in systems where high-frequency signals are sampled. This paper addresses the sampling jitter estimation and cancellation task in the direct RF sub-sampling type radio receivers. The proposed jitter estimation method is based on carefully injecting or super-imposing an additional reference signal to the received signal at sampler input. Proper digital signal processing methods are then devised and applied to estimate the sampling jitter realizations from the obtained jittered samples. Using these jitter estimates, combined with proper jitter modelling, the jitter effects can then be efficiently removed from the actual received signal. Careful performance analysis of the overall estima...
The effect of clock jitter on sampling systems is investigated. Analytical expressions are derived f...
University of Minnesota Ph.D. dissertation. December 2019. Major: Electrical Engineering. Advisor: R...
The effective number of bits of an analogue-to-digital converter (ADC) is limited not only by the qu...
The sampling jitter is particularly problematic in systems where high-frequency signals are sampled....
This paper addresses the sampling jitter estimation and cancellation task in direct RF sub-sampling ...
The sampling jitter is one of the main problems in the direct RF bandpass sampling receiver architec...
The sampling jitter is one of the main problems in the direct RF bandpass sampling receiver architec...
Subsampling receivers are able to down convert signals from radio frequency (RF) to a lower frequenc...
This paper presents a new way to address and mitigate sampling jitter in high-frequency bandpass-sam...
This article addresses the analysis and digital signal processing (DSP)-based mitigation of phase no...
In this paper, the problem of sampling-jitter estimation in OFDM full-duplex radio transceivers is a...
The effective number of bits of an analog-to-digital converter (ADC) is not only limited by the quan...
Abstract: The limitation of the high speed analog to digital converters and synchronization systems ...
Abstract: – It is know for quite some time now (cf. [1-3] and [4]) that practical alias-free signal...
Clock timing jitters refer to random perturbations in the sampling time in analog-to-digital convert...
The effect of clock jitter on sampling systems is investigated. Analytical expressions are derived f...
University of Minnesota Ph.D. dissertation. December 2019. Major: Electrical Engineering. Advisor: R...
The effective number of bits of an analogue-to-digital converter (ADC) is limited not only by the qu...
The sampling jitter is particularly problematic in systems where high-frequency signals are sampled....
This paper addresses the sampling jitter estimation and cancellation task in direct RF sub-sampling ...
The sampling jitter is one of the main problems in the direct RF bandpass sampling receiver architec...
The sampling jitter is one of the main problems in the direct RF bandpass sampling receiver architec...
Subsampling receivers are able to down convert signals from radio frequency (RF) to a lower frequenc...
This paper presents a new way to address and mitigate sampling jitter in high-frequency bandpass-sam...
This article addresses the analysis and digital signal processing (DSP)-based mitigation of phase no...
In this paper, the problem of sampling-jitter estimation in OFDM full-duplex radio transceivers is a...
The effective number of bits of an analog-to-digital converter (ADC) is not only limited by the quan...
Abstract: The limitation of the high speed analog to digital converters and synchronization systems ...
Abstract: – It is know for quite some time now (cf. [1-3] and [4]) that practical alias-free signal...
Clock timing jitters refer to random perturbations in the sampling time in analog-to-digital convert...
The effect of clock jitter on sampling systems is investigated. Analytical expressions are derived f...
University of Minnesota Ph.D. dissertation. December 2019. Major: Electrical Engineering. Advisor: R...
The effective number of bits of an analogue-to-digital converter (ADC) is limited not only by the qu...