FPGA's as Cryptanalytic Tools

This paper presents FPGA1 implementations of two cryptanalytic attacks against DES2. Linear cryptanalysis results from Matsui's work [2] but could not be applied as such and had to be modi-ed to face hardware constraints. We broke a key in about 14 hours on one single FPGA3, becoming the fastest implementation to our knowledge. In paral-lel, we evaluated the possibility of a cryptanalytic time-memory tradeo using distinguished points. The original idea from Hellman [3] has never been implemented. We performed rst experimental re-sults and designed a machine that can break a 40-bit DES in about 15 seconds, with a high success rate (72%), using one PC4. An exhaustive search of the key on the same PC would have taken about 50 days.