Composable Virtual Memory for an Embedded SoC

Systems on a Chip concurrently execute multiple applica-tions that may start and stop at run-time, creating many use-cases. Composability reduces the verification effort, by making the functional and temporal behaviours of an ap-plication independent of other applications. Existing ap-proaches link applications to static address ranges that can-not be reused between applications that are not simultane-ously active, wasting resources. In this paper we propose a composable virtual memory scheme that enables dynamic binding and relocation of applications. Our virtual mem-ory is also predictable, for applications with real-time con-straints. We integrated the virtual memory on, CompSOC, an existing composable SoC prototyped in FPGA. The im-plementation indicates that virtual memory is in general ex-pensive, because it incurs a performance loss around 39% due to address translation latency. On top of this, compos-ability adds to virtual memory an insignificant extra perfor-mance penalty, below 1%