Thermal effects of leakage power in 3D ICs*

Abstract-Thermal issue is a primary concern in three dimensional (3D) integrated circuit (IC) design. In modern IC design, leakage power is becoming a key design challenge which contributes to thermal issues. Due to technology scaling, the leakage power is rising so quickly that it largely increases the die temperature. In this paper, we first investigate the impact of leakage power on thermal profile in 3D packings, and then we analyze thermal and leakage aware jloorplanning based on 3D-STAF[l7} platform. Finally, the effects of thermal controls including the thermal-aware jloorplanner and thermal via insertion for thermal management are analyzed in experiment results. The results show that leakage power increases the maximal temperature on the chip greatly about50%. Hence, the required thermal via number also increases greatly about 52.6 %. Key Words-Leakage Power; Thermal-driven Floorplanning; TSV I. INTRODUCTION AND RECENT WOR