Abstract — A new architecture for modulo 2n+1 multi-operand addition (MOMA) of weighted operands is introduced. It is based on the use of a translator circuit that enables to use n-bit operations for performing the weighted multi-operand addition. Our experimental results indicate that the proposed MOMAs offer significant savings in execution time compared to the previously proposed solutions that either require two parallel additions or a carry-save adder tree with twice the depth of the proposed while they can be implemented in less area in most cases. I
Abstract Novel architectures for designing modulo 2n + 1 subtractors and com-bined adders/subtractor...
Abstract—This paper presents two new design methodologies for modulo 2n 1 addition in the diminishe...
This paper presents multiple-operand adder-subtractor based on Nikhilam Sutra of Vedic mathematics. ...
It is shown that a diminished-1 adder, with minor modi¯cations, can be also used for the modulo 2n þ...
The contribution of this paper is twofold. We firstly show that an augmented diminished-1 adder can ...
In this work we propose a new method for designing modulo 2"+I multipliers for diminished-I ope...
Efficient modulo 2n+1 adders are important for several applications including residue number system,...
Abstract—Multi-moduli architectures, that is, architectures that can deal with more than one modulo ...
Abstract—A family of diminished-1 modulo 2n + 1 adders is proposed in this manuscript. All members o...
International audienceThis paper describes a new accumulate-and-add multiplication algorithm. The me...
Abstract—Two architectures for modulo 2n þ 1 adders are introduced in this paper. The first one is b...
Abstract—Multi-moduli architectures are very useful for reconfigurable digital processors and fault-...
Abstract—A novel architecture for designing modulo 2n+1 multiply-add circuits in the diminished-one ...
Abstract — A new modulo 2k + 1 squarer architecture is proposed for operands in the normal represent...
(eng) This paper is devoted to the study of number representations and algorithms leading to efficie...
Abstract Novel architectures for designing modulo 2n + 1 subtractors and com-bined adders/subtractor...
Abstract—This paper presents two new design methodologies for modulo 2n 1 addition in the diminishe...
This paper presents multiple-operand adder-subtractor based on Nikhilam Sutra of Vedic mathematics. ...
It is shown that a diminished-1 adder, with minor modi¯cations, can be also used for the modulo 2n þ...
The contribution of this paper is twofold. We firstly show that an augmented diminished-1 adder can ...
In this work we propose a new method for designing modulo 2"+I multipliers for diminished-I ope...
Efficient modulo 2n+1 adders are important for several applications including residue number system,...
Abstract—Multi-moduli architectures, that is, architectures that can deal with more than one modulo ...
Abstract—A family of diminished-1 modulo 2n + 1 adders is proposed in this manuscript. All members o...
International audienceThis paper describes a new accumulate-and-add multiplication algorithm. The me...
Abstract—Two architectures for modulo 2n þ 1 adders are introduced in this paper. The first one is b...
Abstract—Multi-moduli architectures are very useful for reconfigurable digital processors and fault-...
Abstract—A novel architecture for designing modulo 2n+1 multiply-add circuits in the diminished-one ...
Abstract — A new modulo 2k + 1 squarer architecture is proposed for operands in the normal represent...
(eng) This paper is devoted to the study of number representations and algorithms leading to efficie...
Abstract Novel architectures for designing modulo 2n + 1 subtractors and com-bined adders/subtractor...
Abstract—This paper presents two new design methodologies for modulo 2n 1 addition in the diminishe...
This paper presents multiple-operand adder-subtractor based on Nikhilam Sutra of Vedic mathematics. ...