Configurable Booth-encoded Modulo 2 n ±1 Multipliers

Abstract—Multi-moduli architectures are very useful for reconfigurable digital processors and fault-tolerant systems that utilize the Residue Number System (RNS). In this paper we propose a novel architecture for configurable modulo 2n±1 multipliers. It uses the modified Booth encoding of the input operand for deriving the required partial products and an adder tree followed by a sparse parallel-prefix final adder for their addition. Experimental results show that the proposed multipliers offer significant savings in area and delay compared to those previously reported in the literature. Keywords-modulo 2n±1 arithmetic; modulo multipliers; Booth-encoding; configurable circuits; residue number system I