International Journal of Emerging Technologies in Computational and Applied Sciences (IJETCAS)

Abstract: For Validation of any algorithm based results recently the advance research is heading in the direction of Hardware Implementation. Whether it is a digital system or a Neural Network system or may be any real time application. With the advent of Nanotechnology(SOC) any design with large number of gates can be squeezed into a tiny chip area with minimum power requirements, which leads to integration of innumerable applications on to a single device so as to design any electronic consumer product initiated in the era of digital convergence. With the introduction of Reconfigurable computing technology since mid of 80’s, FPGA’s have gained momentum for implementation of Random Logic, Prototyping, Reconfigurable Hardware and special purpose computation engines. Similar to FPGA, ASIC may also be implemented though a separate category, has many applications in the area of signal processing and networks. One has many choices for selecting either of these reconfigurable techniques based on Speed, Gate Density, Development, Prototyping and simulation time, cost. Keywords:ANN; SNN;,FPGA; ASIC; Netlist; Power optimization