Abstract—The growing complexity in computer system hierar-chies due to the increase in the number of cores per processor, levels of cache (some of them shared) and the number of processors per node, as well as the high-speed interconnects, demands the use of new optimization techniques and libraries that take advantage of their features. In this paper Servet, a suite of benchmarks focused on detecting a set of parameters with high influence in the overall performance of multicore systems, is presented. These bench-marks are able to detect the cache hierarchy, including their size and which caches are shared by each core, bandwidths and bottlenecks in memory accesses, as well as communication latencies among cores. These parameters can be us...
Our thesis is that operating systems should manage the on-chip shared caches of multicore processors...
Abstract. The increasing complexity of computer architectures has made the approach of automatically...
In today’s multicore era, parallelization of serial code is essential in order to exploit the archit...
This is a post-peer-review, pre-copyedit version of an article published in 2010 IEEE International ...
Servet is a suite of benchmarks focused on detecting a set of parameters with high influence on the ...
This is a post-peer-review, pre-copyedit version of an article published in Computers & Electrical E...
The computation nodes of modern supercomputers commonly consist of multiple multicore processors. To...
The trend of increasing speed and complexity in the single-core processor as stated in the Moore’s l...
Servet is a suite of benchmarks focused on extracting a set of parameters with high influence on the...
The recent transformation from an environment where gains in computational performance came from inc...
Clusters of multicore nodes have become the most popular option for new HPC systems due to their sca...
This is a post-peer-review, pre-copyedit version of an article published in Computers & Electrical E...
Emergence of multicore architectures has opened up new opportunities for thread-level parallelism an...
L augmentation rapide du nombre de cœurs dans les processeurs actuels ne se traduit pas par une mise...
Systems for high performance computing are getting increasingly complex. On the one hand, the number...
Our thesis is that operating systems should manage the on-chip shared caches of multicore processors...
Abstract. The increasing complexity of computer architectures has made the approach of automatically...
In today’s multicore era, parallelization of serial code is essential in order to exploit the archit...
This is a post-peer-review, pre-copyedit version of an article published in 2010 IEEE International ...
Servet is a suite of benchmarks focused on detecting a set of parameters with high influence on the ...
This is a post-peer-review, pre-copyedit version of an article published in Computers & Electrical E...
The computation nodes of modern supercomputers commonly consist of multiple multicore processors. To...
The trend of increasing speed and complexity in the single-core processor as stated in the Moore’s l...
Servet is a suite of benchmarks focused on extracting a set of parameters with high influence on the...
The recent transformation from an environment where gains in computational performance came from inc...
Clusters of multicore nodes have become the most popular option for new HPC systems due to their sca...
This is a post-peer-review, pre-copyedit version of an article published in Computers & Electrical E...
Emergence of multicore architectures has opened up new opportunities for thread-level parallelism an...
L augmentation rapide du nombre de cœurs dans les processeurs actuels ne se traduit pas par une mise...
Systems for high performance computing are getting increasingly complex. On the one hand, the number...
Our thesis is that operating systems should manage the on-chip shared caches of multicore processors...
Abstract. The increasing complexity of computer architectures has made the approach of automatically...
In today’s multicore era, parallelization of serial code is essential in order to exploit the archit...