Systems]

This paper examines a hardware multi-threaded microprocessor and discusses the impact such an architecture has on existing software energy modelling techniques. A framework is constructed for analysing the energy behaviour of the XMOS XS1-L multi-threaded processor and a variation on existing software energy models is proposed, based on analysis of collected energy data. It is shown that by combining execution statistics with sufficient data on the processor’s thread activity and instruction execution costs, a multi-threaded software energy model used with Instruction Set Simulation can yield an average error margin of less than 7%