Abstract—The availability of commercial hardware transactional memory (TM) systems has not yet been met with a rise in the number of large-scale programs that use memory transactions explicitly. A significant impediment to the use of TM is the lack of tool support, specifically profilers that can identify and explain performance anoma-lies. In this paper, we introduce an end-to-end system that enables low-overhead performance profiling of large-scale transactional programs. We present algorithms and an implementation for Intel’s Haswell processors. With our system, it is possible to record a transactional program’s execution with minimal overhead, and then replay it within a custom profiling tool to identify causes of contention and aborts,...
In this paper, we present a Haskell Transactional Memory benchmark in order to provide a comprehensi...
Practically any notebook or desktop computer today is equipped with dual-core chips and already quad...
This thesis presents tools for Transactional Memory (TM) applications that cover multiple TM systems...
Many researchers have developed applications using transactional memory (TM) with the purpose of ben...
This paper presents TMProf, a transactional memory (TM) profiler, based on three visualization princ...
Transactional Memory (TM) is a new programming paradigm that offers an alternative to traditional lo...
Hardware Transactional Memory (TM) attempts to deliver on the promises made with Software Transactio...
This paper presents an extensive performance study of the implementation of Hardware Transactional M...
Hardware transactional memory implementations are becoming increasingly available. For instance, the...
With recent announcements of hardware transactional mem-ory (HTM) systems from IBM and Intel, HTM wi...
Abstract—Multi-core prototyping presents a good oppor-tunity for establishing low overhead and detai...
Chip Multithreading (CMT) processors promise to deliver higher performance by running more than one ...
Transactional memory (TM) is a new optimistic synchronization technique which has the potential of m...
International audienceTransactional Memory (TM) is a new programming paradigm that offers an alterna...
pa•thol•o•gy any deviation from a healthy, normal, or efficient condition. Hardware Transactional Me...
In this paper, we present a Haskell Transactional Memory benchmark in order to provide a comprehensi...
Practically any notebook or desktop computer today is equipped with dual-core chips and already quad...
This thesis presents tools for Transactional Memory (TM) applications that cover multiple TM systems...
Many researchers have developed applications using transactional memory (TM) with the purpose of ben...
This paper presents TMProf, a transactional memory (TM) profiler, based on three visualization princ...
Transactional Memory (TM) is a new programming paradigm that offers an alternative to traditional lo...
Hardware Transactional Memory (TM) attempts to deliver on the promises made with Software Transactio...
This paper presents an extensive performance study of the implementation of Hardware Transactional M...
Hardware transactional memory implementations are becoming increasingly available. For instance, the...
With recent announcements of hardware transactional mem-ory (HTM) systems from IBM and Intel, HTM wi...
Abstract—Multi-core prototyping presents a good oppor-tunity for establishing low overhead and detai...
Chip Multithreading (CMT) processors promise to deliver higher performance by running more than one ...
Transactional memory (TM) is a new optimistic synchronization technique which has the potential of m...
International audienceTransactional Memory (TM) is a new programming paradigm that offers an alterna...
pa•thol•o•gy any deviation from a healthy, normal, or efficient condition. Hardware Transactional Me...
In this paper, we present a Haskell Transactional Memory benchmark in order to provide a comprehensi...
Practically any notebook or desktop computer today is equipped with dual-core chips and already quad...
This thesis presents tools for Transactional Memory (TM) applications that cover multiple TM systems...