Integrated Time Division Multiplexing Front-End Circuit for Multi-Antenna RF Receivers

Abstract — A fully integrated receiver front-end circuit for a 4:1 time division multiplexing of RF signals from an antenna array is introduced. The switching necessary for multiplexing is implemented as an array of low noise amplifiers operating at 2.4 GHz with selectable outputs. The circuit includes on-chip input and output matching networks. A digital controller for rotating through the amplifier inputs was also incorporated. The multiplexer design was fabricated in a 0.18 µm RF-CMOS process. Measurement and post processing results are presented to demonstrate that such a RF multiplexing system can properly recover signal relative phase/amplitude variations at the individual inputs of a multi-antenna receiver. Such a front-end is useful for a variety of antenna array communications applications. Index Terms — Time division multiplexing, array signal processing, diversity methods, switching circuits, amplifiers. I