A Novel Countermeasure to Resist Side Channel Attacks on FPGA Implementations

Abstract—Side Channel Attacks (SCAs) have proven to be very effective in extracting information from algorithmically secure systems. Since the earliest reports of attacks exploiting side channels such as power consumption, timing behavior and electromagnetic radiation etc., the countermeasures to resist such attacks have also been proposed. A variety of countermeasures resisting SCAs have been presented that continue to fade away as resistant attack techniques are developed. Field Programmable Gate Arrays (FPGAs) were originally thought to be resistant to such attacks because of some inherent characteristics. Later, they were also found to leak information over the side channels. In this article a novel countermeasure is presented that hardens an FPGA based system with cipher embodiment, against SCAs. The proposed methodology of embedding single inverter ring oscillators within the synchronous cores helps improve immunity against electromagnetic, fault and glitch attacks, while the introduction of frequency hopping by randomly varying frequency driving the cipher hardens the system against power and timing attacks. The incorporated countermeasure enhances the immunity of FPGA based implementation against multiple types of SCAs without adversely affecting cost or performance. Keywords-Side Channel Attacks; countermeasures; FPGAs; frequency hoppin