Automatic Code Optimization of Application Programs to Improve Performance of on Chip Cache in Multi-Core Systems

purpose of this paper is to propose code transformation techniques on the application program subjected to multi-core system (especially data and loop intensive application). So that the performance of the on-chip shared cache can be improved by converting the successive reuses of the same data elements by several computations (iterations) of loop nest into data locality. In this thesis we will propose the code mapping strategy to map the loop iterations to the several computing cores in such a way that each iteration pair are mapped to the cores which are having shared cache between them. So that successive reuses by these iterations of the loop nest can have the data locality. Our mapping strategy ensures that if two iteration are have very frequent data sharing then they should be mapped to the cores which are sharing their cache at the higher level in the hierarchy (means, the layers close to the cores) so data access latency can be minimized. Here our mapping strategy also considers the physical organization of the target multi-core machine. We also proposing customised scheduling strategy that will schedule the iterations mapped on each core. As mapping ensures only the placement of the iterations to the cores that are having the shared cache at any level in the hierarchy, this does not guarantee that iterations which shares the data will found that data to be shared when reuse actually takes place. It’s the execution order (schedule) of the iterations within the iteration set mapped to particular core will guarantee that if two iteration are having shared data access between them, they use that data in closer proximity (means scheduling strategy specifies the execution order of each iterations assigned to particular core). So that the successive access can find tha