To obtain higher performance with maximum devices and smaller chip size semiconductor devices are continuously shrinking. However, leakage power dissipation increases significantly with the technology scaling. Increasing demand for ultra low power devices has increased significantly since last decade and it compels advance technological solutions to fulfill power requirements of electronic appliances. As a result subthreshold operation region and different device optimization techniques attracts different researchers to achieve ultra low power design of VLSI circuits. Power supply reduction is supposed to be the main parameter to reduce power reduction. However, deep subthreshold region offers speed penalty degrading the overall performance...
With the rapid increase in transmission speeds of communication systems, the demand for very high-sp...
Over the past decade, low power, energy efficient VLSI design has been the focal point of active res...
This book provides practical solutions for delay and power reduction for on-chip interconnects and b...
This paper presents an overview of recent advances on modeling and layout optimization of devices an...
CMOS technology is the key element in the development of VLSI systems since it consumes less power. ...
Power consumption has become as important as performance in todays deep submicron designs. As a res...
As VLSI technology advances to deep sub-micron regime, power consumption has become a critical conce...
Closed-form formulas for optimum buffer insertion where the junction capacitance is taken into accou...
Abstract- Closed-form formulas are presented for optimum supply voltage (VDD) and threshold voltage ...
This dissertation is organized as a collection of papers, where each paper represents original resea...
It is widely accepted that, as semiconductor technology continues to evolve, interconnects have domi...
Power consumption is the bottleneck of system performance. Power reduction has become an important i...
Aggressive voltage scaling into the subthreshold operating region holds great promise for applicatio...
Efficient power management is becoming increasingly important with the rapid growth of portable, wir...
In the present day scenario, designing a circuit with low power has become very important and challe...
With the rapid increase in transmission speeds of communication systems, the demand for very high-sp...
Over the past decade, low power, energy efficient VLSI design has been the focal point of active res...
This book provides practical solutions for delay and power reduction for on-chip interconnects and b...
This paper presents an overview of recent advances on modeling and layout optimization of devices an...
CMOS technology is the key element in the development of VLSI systems since it consumes less power. ...
Power consumption has become as important as performance in todays deep submicron designs. As a res...
As VLSI technology advances to deep sub-micron regime, power consumption has become a critical conce...
Closed-form formulas for optimum buffer insertion where the junction capacitance is taken into accou...
Abstract- Closed-form formulas are presented for optimum supply voltage (VDD) and threshold voltage ...
This dissertation is organized as a collection of papers, where each paper represents original resea...
It is widely accepted that, as semiconductor technology continues to evolve, interconnects have domi...
Power consumption is the bottleneck of system performance. Power reduction has become an important i...
Aggressive voltage scaling into the subthreshold operating region holds great promise for applicatio...
Efficient power management is becoming increasingly important with the rapid growth of portable, wir...
In the present day scenario, designing a circuit with low power has become very important and challe...
With the rapid increase in transmission speeds of communication systems, the demand for very high-sp...
Over the past decade, low power, energy efficient VLSI design has been the focal point of active res...
This book provides practical solutions for delay and power reduction for on-chip interconnects and b...