CMOS ACTIVE PIXEL DESIGN USING 0.6 μm IMAGE SENSOR TECHNOLOGY

This paper describes the Complementary Metal Oxide Semiconductor (CMOS) Active Pixel Sensor (APS) that has become a huge demand for imaging systems because of a better picture quality, low cost, low power consumption and lesser noise as compared with the features of charged coupled devices (CCDs). In this paper, we have designed a CMOS Photodiode APS in 0.6 μm technology that has a lower voltage and noise reduction capability for the pixel. Simulation results with PSPICE and schematic design are presented and discussed. The measured voltage swing at the output for the APS design is 0.47 V to 3.04 V for the supply voltage of 3.3 V and the calculated conversion gain is 5.24590 μV/e. The total capacitance has calculated by simulation result is 30.50 fF. Lastly, we concluded with a description of some applications and opportunities for the CMOS APS