Exploiting Page Write Pattern for Power Management of Hybrid DRAM/PRAM Memory System *

The main memory has become a power bottleneck for computer systems. To reduce the energy dissipation of main memory, the non-volatile phase-change RAM(PRAM) has emerged as one of the promising memories due to its high density and low standby pow-er. But PRAM has its intrinsic disadvantages of long write latency and high write energy. Hence, the hybrid DRAM/PRAM main memory is proposed to provide the advantage of low standby power of PRAM as well as high performance and low access power of DRAM. Data management, such as migrating frequently accessed data from PRAM to DRAM, is widely employed by past work to achieve the benefits of both DRAM and PRAM. But the past work is oblivious to the data migration energy overhead, which is considerable as confirmed by our study. In this work, we studied the page write access pattern of pages within and across applications and observed that two pattern widely ex-ist, namely write-average and write-cluster. We then propose an adaptive page migration strategy(APMS) that migrates data of a page based on its write pattern to reduce the mi-gration energy in DRAM/PRAM hybrid memory system. Our APMS exploits the write pattern of a page and determines the amount of data that should be migrated against the existing page-level data migration strategy. Experiments were conducted to verify the validity of the strategy. The results show that APMS can reduce the energy consumption of most applications with negligible performance impact and energy overhead