The recent availability of Intel Haswell processors marks the transition of hardware transactional memory from research toys to mainstream reality. DBX is an in-memory database that uses Intel’s restricted transactional memory (RTM) to achieve high performance and good scalability across multi-core machines. The main limitation (and also key to practi-cality) of RTM is its constrained working set size: an RTM region that reads or writes too much data will always be aborted. The design of DBX addresses this challenge in sev-eral ways. First, DBX builds a database transaction layer on top of an underlying shared-memory store. The two layers use separate RTM regions to synchronize shared memory access. Second, DBX uses optimistic concurrency c...
Hardware transactional memory implementations are becoming increasingly available. For instance, the...
Abstract Transactional memory (TM) aims at simplifying concurrent programming via the familiar abst...
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by elimi...
Database engines must adapt to the underlying hardware for high-performance transaction execution. C...
Hardware Transactional Memory (TM) attempts to deliver on the promises made with Software Transactio...
The increasing number of cores every generation poses challenges for high-performance in-memory data...
Abstract. With the release of their latest processor microarchitecture, codenamed Haswell, Intel add...
With the introduction of Intel’s restricted hardware transactional memory (HTM) in commodity hardwar...
Concurrency control provides multi-user access to a database system, while ensuring concurrent trans...
Scaling processor performance with future technology nodes is essential to enable future application...
Abstract—So far, transactional memory—although a promising technique—suffered from the absence of an...
Multicore processors are available for over a decade, being the norm for current computer systems, b...
Exploiting thread-level parallelism has become a part of mainstream programming in recent years. Man...
This paper presents an extensive performance study of the implementation of Hardware Transactional M...
Transactional Memory (TM) is an important programming paradigm that can help alleviate difficulties ...
Hardware transactional memory implementations are becoming increasingly available. For instance, the...
Abstract Transactional memory (TM) aims at simplifying concurrent programming via the familiar abst...
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by elimi...
Database engines must adapt to the underlying hardware for high-performance transaction execution. C...
Hardware Transactional Memory (TM) attempts to deliver on the promises made with Software Transactio...
The increasing number of cores every generation poses challenges for high-performance in-memory data...
Abstract. With the release of their latest processor microarchitecture, codenamed Haswell, Intel add...
With the introduction of Intel’s restricted hardware transactional memory (HTM) in commodity hardwar...
Concurrency control provides multi-user access to a database system, while ensuring concurrent trans...
Scaling processor performance with future technology nodes is essential to enable future application...
Abstract—So far, transactional memory—although a promising technique—suffered from the absence of an...
Multicore processors are available for over a decade, being the norm for current computer systems, b...
Exploiting thread-level parallelism has become a part of mainstream programming in recent years. Man...
This paper presents an extensive performance study of the implementation of Hardware Transactional M...
Transactional Memory (TM) is an important programming paradigm that can help alleviate difficulties ...
Hardware transactional memory implementations are becoming increasingly available. For instance, the...
Abstract Transactional memory (TM) aims at simplifying concurrent programming via the familiar abst...
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by elimi...