IMAGE FILTERING VLSI PROCESSOR FOR HIGH SPEED AND LOW POWER IMAGE PROCESSING SYSTEM USING LOGIC IN MEMORY ARCHITECTURE

Abstract: In the era of information and multimedia, the real time IP (image processing) becomes most important in massive applications such as robotics control, surveillance and image recoginition. In such case at present, VLSI expertise focus on high speed processing of image rather considering power consumption and memory module.Even though the performance of the microprocessor and one dimentional(1-D) VLSI processors array are much efficient in speed but it is unable to enhance the low power processing and memory bandwidth. Ultimately, a new VLSI Paradigm is in demand to realise an efficient execution of image processing is image filtering processor.Hence This work evaluates that the proposed approach which outmatches the existing IP algorithms and processors.From the comparison and simulation result it is proved that the proposed architecture overcomes the demerits produced by the existing algorithms and processors