DEDUCT: Design of Efficient DCT Using imprecise Computing

Abstract- The sustained massive growth of the mobile appliance market is pushing the demand for power-efficient Very Large Scale Integration (VLSI) circuits. Most of the VLSI circuits use adders as the base element for arithmetic functions. Mirror adder (MA) is popularly used to implement full adder and subtractor that provide a good opportunity to design approximate versions which can be applied to error tolerant applications. The imprecise versions of adders and subtractors are simulated using Cadence tool and various parameters are analyzed. Based on the analysis the suitable adders and subtractors have been selected to design multibit adders. Using multibit adders a novel 8-point multiplierless Discrete Cosine Transform (DCT) has been designed. The proposed DCT consumes low power, area and delay and can be used for transform coding in digital video appliances. Index Terms—Approximate computing, low power, mirror adder, multiplierless 8 point DCT architecture. I